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authorHaibo Xu <haibo.xu@linaro.org>2025-07-07 18:40:27 +0200
committerPeter Maydell <peter.maydell@linaro.org>2025-07-10 09:25:37 +0100
commit66ba6d1367d7e81d705430ff611af01280953992 (patch)
tree3c803f350555db0e69ee97805bfc89ae10f76dc7 /hw/intc/arm_gicv3_common.c
parent930180f3b9a292639eb894f1ca846683834ed4b7 (diff)
downloadfocaccia-qemu-66ba6d1367d7e81d705430ff611af01280953992.tar.gz
focaccia-qemu-66ba6d1367d7e81d705430ff611af01280953992.zip
hw/arm: Allow setting KVM vGIC maintenance IRQ
Allow virt arm machine to set the interrupt ID for the KVM
GIC maintenance interrupt.

This setting must be done before the KVM_DEV_ARM_VGIC_CTRL_INIT
hence the choice to perform the setting in the GICv3 realize
instead of proceeding the same way as kvm_arm_pmu_set_irq().

Signed-off-by: Haibo Xu <haibo.xu@linaro.org>
Signed-off-by: Miguel Luis <miguel.luis@oracle.com>
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20250707164129.1167837-2-eric.auger@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/arm_gicv3_common.c')
-rw-r--r--hw/intc/arm_gicv3_common.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 1cee68193c..e438d8c042 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -612,6 +612,7 @@ static const Property arm_gicv3_common_properties[] = {
     DEFINE_PROP_BOOL("has-lpi", GICv3State, lpi_enable, 0),
     DEFINE_PROP_BOOL("has-nmi", GICv3State, nmi_support, 0),
     DEFINE_PROP_BOOL("has-security-extensions", GICv3State, security_extn, 0),
+    DEFINE_PROP_UINT32("maintenance-interrupt-id", GICv3State, maint_irq, 0),
     /*
      * Compatibility property: force 8 bits of physical priority, even
      * if the CPU being emulated should have fewer.