summary refs log tree commit diff stats
path: root/hw/intc/arm_gicv3_common.c
diff options
context:
space:
mode:
authorPranith Kumar <bobby.prani@gmail.com>2017-09-04 15:21:56 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-09-04 17:13:53 +0100
commit7229ec5825df6b933f150b54a8a2bedd2de1864c (patch)
treefab8d4164ff9c0a73fdaad41ee06815d6163e504 /hw/intc/arm_gicv3_common.c
parent3e4d91b94ce400326fae0850578d9e9f30a71adb (diff)
downloadfocaccia-qemu-7229ec5825df6b933f150b54a8a2bedd2de1864c.tar.gz
focaccia-qemu-7229ec5825df6b933f150b54a8a2bedd2de1864c.zip
arm_gicv3_kvm: Fix compile warning
Fix the following warning:

/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: warning: logical not is only applied to the left hand side of this bitwise operator [-Wlogical-not-parentheses]
            if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
                ^             ~
/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: note: add parentheses after the '!' to evaluate the bitwise operator first
            if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
                ^
/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: note: add parentheses around left hand side expression to silence this warning
            if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
                ^

This logic error meant we were not setting the PTZ
bit when we should -- luckily as the comment suggests
this wouldn't have had any effects beyond making GIC
initialization take a little longer.

Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-id: 20170829173226.7625-1-bobby.prani@gmail.com
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/arm_gicv3_common.c')
0 files changed, 0 insertions, 0 deletions