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| author | Aleksandar Markovic <aleksandar.markovic@imgtec.com> | 2016-06-10 11:57:37 +0200 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2016-06-24 13:43:53 +0100 |
| commit | 77be419980114d75605811e1681115d0919cfa1a (patch) | |
| tree | 5ee60eba85594e3f5c8d987bfc145e0e76130ff6 /hw/intc/arm_gicv3_cpuif.c | |
| parent | 599bc5e89c46f95f86ccad0d747d041c89a28806 (diff) | |
| download | focaccia-qemu-77be419980114d75605811e1681115d0919cfa1a.tar.gz focaccia-qemu-77be419980114d75605811e1681115d0919cfa1a.zip | |
target-mips: Add FCR31's FS bit definition
Add preprocessor definition of FCR31's FS bit, and update related code for setting this bit. Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'hw/intc/arm_gicv3_cpuif.c')
0 files changed, 0 insertions, 0 deletions