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| author | Shlomo Pongratz <shlomo.pongratz@huawei.com> | 2016-06-17 15:23:47 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-17 15:23:51 +0100 |
| commit | e52af5134035b0fa6d257f68456f6fa8655c86d3 (patch) | |
| tree | 33961d0c8f1709d9e8a271df14aa1a7c2ea7dba1 /hw/intc/arm_gicv3_cpuif.c | |
| parent | ce187c3c15f4bda579c9833cd78092fb73e651aa (diff) | |
| download | focaccia-qemu-e52af5134035b0fa6d257f68456f6fa8655c86d3.tar.gz focaccia-qemu-e52af5134035b0fa6d257f68456f6fa8655c86d3.zip | |
hw/intc/arm_gicv3: Implement GICv3 distributor registers
Implement the distributor registers of a GICv3. Signed-off-by: Shlomo Pongratz <shlomo.pongratz@huawei.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1465915112-29272-12-git-send-email-peter.maydell@linaro.org [PMM: significantly overhauled/rewritten: * use the new bitmap data structures * restructure register read/write to handle different width accesses natively, since almost all registers are 32-bit only, rather than implementing everything as byte accesses * implemented security extension support ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/arm_gicv3_cpuif.c')
0 files changed, 0 insertions, 0 deletions