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| author | Bibo Mao <maobibo@loongson.cn> | 2025-05-07 10:31:38 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2025-05-14 15:46:08 +0800 |
| commit | 53339a8120d9be6a448f29dd1138bab2fa15e34d (patch) | |
| tree | 5ed505386f4d9253315ff86f06322c1c97d2ba81 /hw/intc/xilinx_intc.c | |
| parent | ab3ab67348b1e34630272b05f9f7f187fd6a1f8f (diff) | |
| download | focaccia-qemu-53339a8120d9be6a448f29dd1138bab2fa15e34d.tar.gz focaccia-qemu-53339a8120d9be6a448f29dd1138bab2fa15e34d.zip | |
hw/intc/loongarch_pch: Discard write operation with ISR register
With the latest 7A1000 user manual, interrupt status register ISR is read only. Here discard write operation with ISR register. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023148.1877287-7-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Diffstat (limited to 'hw/intc/xilinx_intc.c')
0 files changed, 0 insertions, 0 deletions