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authorPeter Maydell <peter.maydell@linaro.org>2024-02-16 11:05:14 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-02-16 11:05:14 +0000
commitda96ad4a6a2ef26c83b15fa95e7fceef5147269c (patch)
tree3780fdfeef4cb0a04dd2c5b3aa4e444adf38aac7 /hw/mips/boston.c
parent8e31b744fdf2c5d933681e4128acee72a83af4b8 (diff)
parent9a4b35f57eefbfc6977ed47d1f19d839e9e4784d (diff)
downloadfocaccia-qemu-da96ad4a6a2ef26c83b15fa95e7fceef5147269c.tar.gz
focaccia-qemu-da96ad4a6a2ef26c83b15fa95e7fceef5147269c.zip
Merge tag 'hw-misc-20240215' of https://github.com/philmd/qemu into staging
Misc HW patch queue

- Remove unused MIPS SAAR* registers (Phil)
- Remove warning when testing the TC58128 NAND EEPROM (Peter)
- KConfig cleanups around ISA SuperI/O and MIPS (Paolo)
- QDev API uses sanitization (Philippe)
- Split AHCI model as PCI / SysBus (Philippe)
- Add SMP support to SPARC Leon3 board (Clément)

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# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'hw-misc-20240215' of https://github.com/philmd/qemu: (56 commits)
  hw/ide/ich9: Use AHCIPCIState typedef
  hw/ide/ahci: Move SysBus definitions to 'ahci-sysbus.h'
  hw/ide/ahci: Remove SysbusAHCIState::num_ports field
  hw/ide/ahci: Do not pass 'ports' argument to ahci_realize()
  hw/ide/ahci: Convert AHCIState::ports to unsigned
  hw/ide/ahci: Pass AHCI context to ahci_ide_create_devs()
  hw/ide/ahci: Inline ahci_get_num_ports()
  hw/ide/ahci: Rename AHCI PCI function as 'pdev'
  hw/ide/ahci: Expose AHCIPCIState structure
  hw/i386/q35: Use DEVICE() cast macro with PCIDevice object
  hw/i386/q35: Simplify pc_q35_init() since PCI is always enabled
  MAINTAINERS: Add myself as reviewer for TCG Plugins
  MAINTAINERS: replace Fabien by myself as Leon3 maintainer
  hw/sparc/leon3: Initialize GPIO before realizing CPU devices
  hw/sparc/leon3: Pass DeviceState opaque argument to leon3_start_cpu()
  hw/sparc/leon3: Pass DeviceState opaque argument to leon3_set_pil_in()
  hw/sparc/leon3: check cpu_id in the tiny bootloader
  hw/sparc/leon3: implement multiprocessor
  hw/sparc/leon3: remove SP initialization
  target/sparc: implement asr17 feature for smp
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/mips/boston.c')
-rw-r--r--hw/mips/boston.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 4e11ff6cd6..1b44fb354c 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -24,7 +24,7 @@
 #include "hw/boards.h"
 #include "hw/char/serial.h"
 #include "hw/ide/pci.h"
-#include "hw/ide/ahci.h"
+#include "hw/ide/ahci-pci.h"
 #include "hw/loader.h"
 #include "hw/loader-fit.h"
 #include "hw/mips/bootloader.h"
@@ -677,7 +677,8 @@ static void boston_mach_init(MachineState *machine)
     MemoryRegion *flash, *ddr_low_alias, *lcd, *platreg;
     MemoryRegion *sys_mem = get_system_memory();
     XilinxPCIEHost *pcie2;
-    PCIDevice *ahci;
+    PCIDevice *pdev;
+    AHCIPCIState *ich9;
     DriveInfo *hd[6];
     Chardev *chr;
     int fw_size, fit_err;
@@ -769,11 +770,12 @@ static void boston_mach_init(MachineState *machine)
     qemu_chr_fe_set_handlers(&s->lcd_display, NULL, NULL,
                              boston_lcd_event, NULL, s, NULL, true);
 
-    ahci = pci_create_simple_multifunction(&PCI_BRIDGE(&pcie2->root)->sec_bus,
+    pdev = pci_create_simple_multifunction(&PCI_BRIDGE(&pcie2->root)->sec_bus,
                                            PCI_DEVFN(0, 0), TYPE_ICH9_AHCI);
-    g_assert(ARRAY_SIZE(hd) == ahci_get_num_ports(ahci));
-    ide_drive_get(hd, ahci_get_num_ports(ahci));
-    ahci_ide_create_devs(ahci, hd);
+    ich9 = ICH9_AHCI(pdev);
+    g_assert(ARRAY_SIZE(hd) == ich9->ahci.ports);
+    ide_drive_get(hd, ich9->ahci.ports);
+    ahci_ide_create_devs(&ich9->ahci, hd);
 
     if (machine->firmware) {
         fw_size = load_image_targphys(machine->firmware,