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| author | Peter Maydell <peter.maydell@linaro.org> | 2025-07-18 18:30:30 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-07-21 11:15:08 +0100 |
| commit | 07327d5f451162a841747836ff05cc6dd6e8c023 (patch) | |
| tree | 0f50318bb21a1d04b0715baaccc8ffdeda61890d /hw/misc/ivshmem-pci.c | |
| parent | 17f6436822ff600cae4590c4b06b3321c97f1f42 (diff) | |
| download | focaccia-qemu-07327d5f451162a841747836ff05cc6dd6e8c023.tar.gz focaccia-qemu-07327d5f451162a841747836ff05cc6dd6e8c023.zip | |
target/arm: Don't nest H() macro calls in SVE DO_REDUCE
In the part of the SVE DO_REDUCE macro used by the SVE2p1 FMAXQV,
FMINQV, etc insns, we incorrectly applied the H() macro twice when
calculating an offset to add to the vn pointer. This has no effect
on little-endian hosts but on big-endian hosts the two invocations
will cancel each other out and we will access the wrong part of the
array.
The "s * 16" part of the expression is already aligned, so we only
need to use the H macro on the "e". Correct the macro usage.
Fixes: 1de7ecfc12d05 ("target/arm: Implement FADDQV, F{MIN, MAX}{NM}QV for SVE2p1")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250718173032.2498900-9-peter.maydell@linaro.org
Diffstat (limited to 'hw/misc/ivshmem-pci.c')
0 files changed, 0 insertions, 0 deletions