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| author | Bin Meng <bmeng.cn@gmail.com> | 2019-05-17 08:51:24 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-06-27 02:47:06 -0700 |
| commit | 382cb4392ff8c3fa911d10da959eb8b0cbee15af (patch) | |
| tree | fbc3fc52acfcc318ee44bc194368d6f4bd71921f /hw/timer/lm32_timer.c | |
| parent | 2e3df911c5bb8199b72427a36ce68a8fe2decf1f (diff) | |
| download | focaccia-qemu-382cb4392ff8c3fa911d10da959eb8b0cbee15af.tar.gz focaccia-qemu-382cb4392ff8c3fa911d10da959eb8b0cbee15af.zip | |
riscv: sifive_u: Do not create hard-coded phandles in DT
At present the cpu, plic and ethclk nodes' phandles are hard-coded to 1/2/3 in DT. If we configure more than 1 cpu for the machine, all cpu nodes' phandles conflict with each other as they are all 1. Fix it by removing the hardcode. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/timer/lm32_timer.c')
0 files changed, 0 insertions, 0 deletions