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authorLuc Michel <luc.michel@amd.com>2025-09-26 09:07:46 +0200
committerPeter Maydell <peter.maydell@linaro.org>2025-10-07 10:35:36 +0100
commite4a9bc0aae9f98c64a9689f9471234636e6d3ae0 (patch)
treea3c5542bbd6c19054b23b553cdf37139459d7e0d /include/hw/arm/xlnx-versal.h
parentcf8f12b6e719dca00e015febb5d5bbb1f3d6aa7f (diff)
downloadfocaccia-qemu-e4a9bc0aae9f98c64a9689f9471234636e6d3ae0.tar.gz
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hw/arm/xlnx-versal: ddr: refactor creation
Refactor the DDR aperture regions creation using the VersalMap
structure. Device creation and FDT node creation are split into two
functions because the later must happen during ARM virtual bootloader
modify_dtb callback.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250926070806.292065-29-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm/xlnx-versal.h')
-rw-r--r--include/hw/arm/xlnx-versal.h7
1 files changed, 2 insertions, 5 deletions
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index e1d6e54549..39bc414c85 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -44,11 +44,6 @@ struct Versal {
     MemoryRegion mr_ps;
 
     struct {
-        /* 4 ranges to access DDR.  */
-        MemoryRegion mr_ddr_ranges[4];
-    } noc;
-
-    struct {
         uint32_t clk_25mhz;
         uint32_t clk_125mhz;
         uint32_t gic;
@@ -73,6 +68,8 @@ static inline void versal_set_fdt(Versal *s, void *fdt)
     s->cfg.fdt = fdt;
 }
 
+void versal_fdt_add_memory_nodes(Versal *s, uint64_t ram_size);
+
 DeviceState *versal_get_boot_cpu(Versal *s);
 void versal_sdhci_plug_card(Versal *s, int sd_idx, BlockBackend *blk);
 void versal_efuse_attach_drive(Versal *s, BlockBackend *blk);