summary refs log tree commit diff stats
path: root/include/hw/intc
diff options
context:
space:
mode:
authorJiaxun Yang <jiaxun.yang@flygoat.com>2024-05-08 14:06:49 +0100
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2024-06-19 12:42:03 +0200
commit49eba52a52fec563af83a77d5ec5c59dba412127 (patch)
treee2528608c1386ba7057d74ebea2c4c51ea670eaf /include/hw/intc
parent5f82fb2a3a71bb510b3e1b7229929d468c01740a (diff)
downloadfocaccia-qemu-49eba52a52fec563af83a77d5ec5c59dba412127.tar.gz
focaccia-qemu-49eba52a52fec563af83a77d5ec5c59dba412127.zip
hw/intc/loongson_ipi: Provide per core MMIO address spaces
The real IPI hardware have dedicated MMIO registers mapped into
memory address space for every core. This is not used by LoongArch
guest software but it is essential for CPU without IOCSR such as
Loongson-3A1000.

Implement it with existing infrastructure.

Acked-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-ID: <20240605-loongson3-ipi-v3-2-ddd2c0e03fa3@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'include/hw/intc')
-rw-r--r--include/hw/intc/loongson_ipi.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h
index 2c0e8820f5..3f795edbf3 100644
--- a/include/hw/intc/loongson_ipi.h
+++ b/include/hw/intc/loongson_ipi.h
@@ -34,6 +34,8 @@
 OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPI, LOONGSON_IPI)
 
 typedef struct IPICore {
+    LoongsonIPI *ipi;
+    MemoryRegion *ipi_mmio_mem;
     uint32_t status;
     uint32_t en;
     uint32_t set;