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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-05-22 20:16:15 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-06-24 16:48:07 +0200 |
| commit | 05d9d0359e6da7dc8255712d745d079a04fa5ae5 (patch) | |
| tree | b2d8e297ad3466988d87e5b30fa161ae0039d0b4 /python/qemu/utils/accel.py | |
| parent | a071578b93e850dcbebbe2c0cfe86e7977ddffa7 (diff) | |
| download | focaccia-qemu-05d9d0359e6da7dc8255712d745d079a04fa5ae5.tar.gz focaccia-qemu-05d9d0359e6da7dc8255712d745d079a04fa5ae5.zip | |
target/mips: Do not abort on invalid instruction
On real hardware an invalid instruction doesn't halt the world, but usually triggers a RESERVED INSTRUCTION exception. TCG guest code shouldn't abort QEMU anyway. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210617174323.2900831-2-f4bug@amsat.org>
Diffstat (limited to 'python/qemu/utils/accel.py')
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