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| author | Frank Chang <frank.chang@sifive.com> | 2021-12-10 15:56:48 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-12-20 14:53:31 +1000 |
| commit | 3ce4c09df75529da0a5798279a01e24c02df15da (patch) | |
| tree | a967057e0ffa85265f53c4c432f88402373d3855 /python/qemu/utils/accel.py | |
| parent | 900da87ab966654be76cc9c2fb860329cb423bd4 (diff) | |
| download | focaccia-qemu-3ce4c09df75529da0a5798279a01e24c02df15da.tar.gz focaccia-qemu-3ce4c09df75529da0a5798279a01e24c02df15da.zip | |
target/riscv: rvv-1.0: widening floating-point/integer type-convert
Add the following instructions: * vfwcvt.rtz.xu.f.v * vfwcvt.rtz.x.f.v Also adjust GEN_OPFV_WIDEN_TRANS() to accept multiple floating-point rounding modes. Signed-off-by: Frank Chang <frank.chang@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20211210075704.23951-63-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python/qemu/utils/accel.py')
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