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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-06-17 13:15:56 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-06-21 17:12:50 +0100 |
| commit | 9333fe4dd39709ce9898750d517568e5c2fb2e32 (patch) | |
| tree | 4f30cc1cfa2acf850d3bd929b96e5ab5176c7d3f /python/qemu/utils/accel.py | |
| parent | 68245e442c9e5175d5e9d3a797dcab7eee800253 (diff) | |
| download | focaccia-qemu-9333fe4dd39709ce9898750d517568e5c2fb2e32.tar.gz focaccia-qemu-9333fe4dd39709ce9898750d517568e5c2fb2e32.zip | |
target/arm: Implement MVE VADD, VSUB, VMUL
Implement the MVE VADD, VSUB and VMUL insns. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210617121628.20116-13-peter.maydell@linaro.org
Diffstat (limited to 'python/qemu/utils/accel.py')
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