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| author | Luc Michel <luc.michel@amd.com> | 2025-09-26 09:07:37 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-10-07 10:35:36 +0100 |
| commit | e17df660769d24dc6d5d0c75ab4de16033705924 (patch) | |
| tree | 8038e0aa3c353ff590d7b17b0759730217426ce7 /python/qemu/utils/accel.py | |
| parent | aaf889ebdc6ed054a975465fee18feea2450c446 (diff) | |
| download | focaccia-qemu-e17df660769d24dc6d5d0c75ab4de16033705924.tar.gz focaccia-qemu-e17df660769d24dc6d5d0c75ab4de16033705924.zip | |
hw/arm/xlnx-versal-virt: virtio: refactor creation
Refactor the creation of virtio devices. Use the accessors provided by the Versal SoC to retrieve the reserved MMIO and IRQ space. Those are defined in the VersalMap structure. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-20-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'python/qemu/utils/accel.py')
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