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| author | Rajnesh Kanwal <rkanwal@rivosinc.com> | 2025-02-05 11:18:48 +0000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-03-04 15:42:54 +1000 |
| commit | 4ff7a27adce4c880d2137788da0fc57d75ee80be (patch) | |
| tree | 11864156159ed2d3fa9970f59884259ef5f1a64d /rust/qemu-api/src/bitops.rs | |
| parent | c48bd18eaeb676a7236030eb9b7984b9244d7750 (diff) | |
| download | focaccia-qemu-4ff7a27adce4c880d2137788da0fc57d75ee80be.tar.gz focaccia-qemu-4ff7a27adce4c880d2137788da0fc57d75ee80be.zip | |
target/riscv: Add support to record CTR entries.
This commit adds logic to records CTR entries of different types and adds required hooks in TCG and interrupt/Exception logic to record events. This commit also adds support to invoke freeze CTR logic for breakpoint exceptions and counter overflow interrupts. Signed-off-by: Rajnesh Kanwal <rkanwal@rivosinc.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250205-b4-ctr_upstream_v6-v6-4-439d8e06c8ef@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'rust/qemu-api/src/bitops.rs')
0 files changed, 0 insertions, 0 deletions