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| author | Luc Michel <luc.michel@amd.com> | 2025-09-26 09:07:35 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-10-07 10:35:36 +0100 |
| commit | b913b3cb26d531f71ccf89e886c0d0f520e80077 (patch) | |
| tree | bac410bcfb83f296ee0f243625d3639d9075f498 /scripts/arm_processor_error.py | |
| parent | 176faad4bf7565966398df0d6e8cd05825dfceea (diff) | |
| download | focaccia-qemu-b913b3cb26d531f71ccf89e886c0d0f520e80077.tar.gz focaccia-qemu-b913b3cb26d531f71ccf89e886c0d0f520e80077.zip | |
hw/arm/xlnx-versal: cfu: refactor creation
Refactor the CFU device creation using the VersalMap structure. All users of the APB IRQ OR gate have now been converted. The OR gate device can be dropped. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-18-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/arm_processor_error.py')
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