diff options
| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-02-09 08:49:43 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-02-15 15:53:12 +0100 |
| commit | 5235993f98f2842253b59d3ce786290b4644ca51 (patch) | |
| tree | 38400f4ff0f982e6cbd43db95a97bc741f27bf96 /target/mips/cpu.h | |
| parent | addd0c28741df1a503a97a45e9dc4976ea8e0b9a (diff) | |
| download | focaccia-qemu-5235993f98f2842253b59d3ce786290b4644ca51.tar.gz focaccia-qemu-5235993f98f2842253b59d3ce786290b4644ca51.zip | |
target/mips: Remove CPUMIPSState::CP0_SAAR[2] field
Remove the unused CP0_SAAR[2] registers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240209090513.9401-8-philmd@linaro.org>
Diffstat (limited to 'target/mips/cpu.h')
| -rw-r--r-- | target/mips/cpu.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h index ef1d9f279c..5e97b5b422 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -749,7 +749,6 @@ typedef struct CPUArchState { int32_t CP0_Count; uint32_t CP0_SAARI; #define CP0SAARI_TARGET 0 /* 5..0 */ - uint64_t CP0_SAAR[2]; #define CP0SAAR_BASE 12 /* 43..12 */ #define CP0SAAR_SIZE 1 /* 5..1 */ #define CP0SAAR_EN 0 |