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authorPeter Maydell <peter.maydell@linaro.org>2019-03-05 21:07:29 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-03-05 21:07:29 +0000
commitb5b6b2b912bbcd3953407da938a8f969577ad3a1 (patch)
tree57900df799ddbb06c25c34bf0a90842646806f63 /tests/tcg/mips/include/test_utils_64.h
parenta3e3b0a7bd5de211a62cdf2d6c12b96d3c403560 (diff)
parent0fdd986a6c8f921693d025c3f095a0eaf628b6b6 (diff)
downloadfocaccia-qemu-b5b6b2b912bbcd3953407da938a8f969577ad3a1.tar.gz
focaccia-qemu-b5b6b2b912bbcd3953407da938a8f969577ad3a1.zip
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-mar-05-2019' into staging
MIPS queue for March 5th, 2019

# gpg: Signature made Tue 05 Mar 2019 16:06:34 GMT
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-mar-05-2019:
  target/mips: Add tests for integer add MSA instruction group
  tests/tcg: target/mips: Add tests for MSA pack instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 shift instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 logic instructions
  tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructions
  tests/tcg: target/mips: Extend functionality of MSA wrapper macros
  tests/tcg: target/mips: Fix test utilities for 128-bit tests
  tests/tcg: target/mips: Add test utilities for 64-bit tests
  tests/tcg: target/mips: Add test utilities for 32-bit tests
  tests/tcg: target/mips: Add wrappers for various MSA instructions
  disas: nanoMIPS: Add graphical description of pool organization
  disas: nanoMIPS: Correct comments to handlers of some DSP instructions

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests/tcg/mips/include/test_utils_64.h')
-rw-r--r--tests/tcg/mips/include/test_utils_64.h78
1 files changed, 78 insertions, 0 deletions
diff --git a/tests/tcg/mips/include/test_utils_64.h b/tests/tcg/mips/include/test_utils_64.h
new file mode 100644
index 0000000000..ee3828472c
--- /dev/null
+++ b/tests/tcg/mips/include/test_utils_64.h
@@ -0,0 +1,78 @@
+/*
+ *  Header file for test utilities
+ *
+ *  Copyright (C) 2019  Wave Computing, Inc.
+ *  Copyright (C) 2019  Aleksandar Markovic <amarkovic@wavecomp.com>
+ *
+ *  This program is free software: you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation, either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program.  If not, see <https://www.gnu.org/licenses/>.
+ *
+ */
+
+#ifndef TEST_UTILS_64_H
+#define TEST_UTILS_64_H
+
+#include <stdio.h>
+#include <stdint.h>
+#include <inttypes.h>
+#include <string.h>
+
+#define PRINT_RESULTS 0
+
+
+static inline int32_t check_results_64(const char *instruction_name,
+                                       const uint32_t test_count,
+                                       const double elapsed_time,
+                                       const uint64_t *b64_result,
+                                       const uint64_t *b64_expect)
+{
+#if PRINT_RESULTS
+    uint32_t ii;
+    printf("\n");
+    for (ii = 0; ii < test_count; ii++) {
+        uint64_t a;
+        memcpy(&a, (b64_result + ii), 8);
+        if (ii % 8 != 0) {
+            printf("        0x%016llxULL,\n", a);
+        } else {
+            printf("        0x%016llxULL,                    /* %3d  */\n",
+                   a, ii);
+        }
+    }
+    printf("\n");
+#endif
+    uint32_t i;
+    uint32_t pass_count = 0;
+    uint32_t fail_count = 0;
+
+    printf("%s:   ", instruction_name);
+    for (i = 0; i < test_count; i++) {
+        if (b64_result[i] == b64_expect[i]) {
+            pass_count++;
+        } else {
+            fail_count++;
+        }
+    }
+
+    printf("PASS: %3d   FAIL: %3d   elapsed time: %5.2f ms\n",
+           pass_count, fail_count, elapsed_time);
+
+    if (fail_count > 0) {
+        return -1;
+    } else {
+        return 0;
+    }
+}
+
+
+#endif