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-rw-r--r--hw/mem/cxl_type3.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 12205c4d32..b553c7d646 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1234,7 +1234,6 @@ static const Property ct3_props[] = {
                                 speed, PCIE_LINK_SPEED_32),
     DEFINE_PROP_PCIE_LINK_WIDTH("x-width", CXLType3Dev,
                                 width, PCIE_LINK_WIDTH_16),
-    DEFINE_PROP_END_OF_LIST(),
 };
 
 static uint64_t get_lsa_size(CXLType3Dev *ct3d)