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* hw/misc/xlnx-versal-crl: add the versal2 versionLuc Michel2025-10-071-0/+392
| | | | | | | | | | | | | Add the versal2 version of the CRL device. For the implemented part, it is similar to the versal version but drives reset line of more devices. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-37-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/misc/xlnx-versal-crl: refactor device reset logicLuc Michel2025-10-071-75/+88
| | | | | | | | | | | | | | | | Refactor the device reset logic to have a common register write callback for all the devices. This uses a decode function to map the register address to the actual peripheral to reset. This refactoring changes the CPU property name from cpu_r5[*] to rpu[*] to ease with the connections in the Versal SoC. It also fixes a bug where the gem device pointer was mapped to the usb link property. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-33-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/misc/xlnx-versal-crl: split into base/concrete classesLuc Michel2025-10-071-19/+29
| | | | | | | | | | | | Split the TYPE_XLNX_VERSAL_CRL type into base and concrete classes. This is in preparation for the versal2 version of the CRL. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-32-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/misc/xlnx-versal-crl: remove unnecessary include directivesLuc Michel2025-10-071-4/+1
| | | | | | | | | | | Drop unused include directives from xlnx-versal-crl.c Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-31-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* qom: Have class_init() take a const data argumentPhilippe Mathieu-Daudé2025-04-251-1/+1
| | | | | | | | | | Mechanical change using gsed, then style manually adapted to pass checkpatch.pl script. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424194905.82506-4-philmd@linaro.org>
* hw, target: Add ResetType argument to hold and exit phase methodsPeter Maydell2024-04-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | We pass a ResetType argument to the Resettable class enter phase method, but we don't pass it to hold and exit, even though the callsites have it readily available. This means that if a device cared about the ResetType it would need to record it in the enter phase method to use later on. Pass the type to all three of the phase methods to avoid having to do that. Commit created with for dir in hw target include; do \ spatch --macro-file scripts/cocci-macro-file.h \ --sp-file scripts/coccinelle/reset-type.cocci \ --keep-comments --smpl-spacing --in-place \ --include-headers --dir $dir; done and no manual edits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc.michel@amd.com> Message-id: 20240412160809.1260625-5-peter.maydell@linaro.org
* hw/misc/xlnx-versal-crl: Build it only oncePhilippe Mathieu-Daudé2024-01-261-1/+0
| | | | | | | | | | | hw/misc/xlnx-versal-crl.c doesn't require "cpu.h" anymore. By removing it, the unit become target agnostic: we can build it once. Update meson. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-15-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/misc/xlnx-versal-crl: Include generic 'cpu-qom.h' instead of 'cpu.h'Philippe Mathieu-Daudé2024-01-261-0/+1
| | | | | | | | | | | | | | | | "target/arm/cpu.h" is target specific, any file including it becomes target specific too, thus this is the same for any file including "hw/misc/xlnx-versal-crl.h". "hw/misc/xlnx-versal-crl.h" doesn't require any target specific definition however, only the target-agnostic QOM definitions from "target/arm/cpu-qom.h". Include the latter header to avoid tainting unnecessary objects as target-specific. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-14-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Expose arm_cpu_mp_affinity() in 'multiprocessing.h' headerPhilippe Mathieu-Daudé2024-01-261-0/+1
| | | | | | | | | | | | | | | | Declare arm_cpu_mp_affinity() prototype in the new "target/arm/multiprocessing.h" header so units in hw/arm/ can use it without having to include the huge target-specific "cpu.h". File list to include the new header generated using: $ git grep -lw arm_cpu_mp_affinity Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-11-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Create arm_cpu_mp_affinityRichard Henderson2024-01-261-2/+2
| | | | | | | | | | Wrapper to return the mp affinity bits from the cpu. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-10-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/misc: Constify VMStateRichard Henderson2023-12-301-1/+1
| | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-41-richard.henderson@linaro.org>
* hw/misc: Add a model of the Xilinx Versal CRLEdgar E. Iglesias2022-04-211-0/+421
Add a model of the Xilinx Versal CRL. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Frederic Konrad <fkonrad@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20220406174303.2022038-4-edgar.iglesias@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>