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path: root/hw/ppc/pnv_core.c (follow)
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* ppc/pnv: Improve pervasive topology calculation for big-coreCaleb Schlossin2024-03-131-4/+4
* hw/ppc: Reset timebase facilities on machine resetNicholas Piggin2023-09-061-0/+2
* ppc/pnv: Add QME region for P10Joel Stanley2023-07-071-2/+76
* ppc/pnv: Set P10 core xscom region size to match hardwareNicholas Piggin2023-07-071-2/+4
* ppc/pnv: Log all unimp warnings with similar messageJoel Stanley2023-07-071-16/+18
* ppc/pnv: SMT support for powernvNicholas Piggin2023-07-071-8/+5
* ppc/pnv: Return zero for core thread state xscomJoel Stanley2023-07-071-0/+10
* ppc/pnv: Add P10 core xscom modelJoel Stanley2023-07-071-2/+42
* ppc/pnv: Add P10 quad xscom modelJoel Stanley2023-07-071-0/+54
* ppc/pnv: Subclass quad xscom callbacksJoel Stanley2023-07-071-13/+27
* ppc/pnv: quad xscom callbacks are P9 specificJoel Stanley2023-07-071-9/+10
* target/ppc: Add POWER9 DD2.2 modelNicholas Piggin2023-05-281-1/+1
* include/hw/ppc: Split pnv_chip.h off pnv.hMarkus Armbruster2023-01-201-0/+1
* target/ppc: introduce ppc_maybe_interruptMatheus Ferst2022-10-281-0/+1
* ppc/pnv: Rename "id" to "quad-id" in PnvQuadCédric Le Goater2021-09-291-2/+2
* ppc/pnv: Change the POWER10 machine to support DD2 onlyCédric Le Goater2021-08-271-1/+1
* hw/ppc/pnv_core: Update hflags after setting msrRichard Henderson2021-05-041-1/+2
* non-virt: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
* error: Eliminate error_propagate() with Coccinelle, part 1Markus Armbruster2020-07-101-2/+1
* qdev: Use returned bool to check for qdev_realize() etc. failureMarkus Armbruster2020-07-101-2/+1
* qdev: Convert bus-less devices to qdev_realize() with CoccinelleMarkus Armbruster2020-06-151-1/+1
* qdev: Unrealize must not failMarkus Armbruster2020-05-151-1/+1
* qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster2020-05-151-1/+1
* ppc/pnv: change the PowerNV machine devices to be non user creatableCédric Le Goater2020-02-021-0/+2
* ppc/pnv: Add support for "hostboot" modeCédric Le Goater2020-02-021-0/+3
* ppc/pnv: remove useless "core-pir" property alias.Cédric Le Goater2020-02-021-15/+13
* qdev: set properties with device_class_set_props()Marc-André Lureau2020-01-241-2/+2
* ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machineCédric Le Goater2019-12-171-0/+10
* ppc/pnv: Link "chip" property to PnvCore::chip pointerGreg Kurz2019-12-171-8/+2
* ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChipGreg Kurz2019-11-181-3/+4
* ppc/pnv: Fix naming of routines realizing the CPUsCédric Le Goater2019-10-241-4/+4
* ppc: Reset the interrupt presenter from the CPU reset handlerCédric Le Goater2019-10-241-2/+5
* ppc/pnv: Add a PnvChip pointer to PnvCoreCédric Le Goater2019-10-241-1/+2
* ppc/pnv: Introduce a PnvCore reset handlerCédric Le Goater2019-10-241-4/+15
* Clean up inclusion of sysemu/sysemu.hMarkus Armbruster2019-08-161-1/+0
* Include hw/qdev-properties.h lessMarkus Armbruster2019-08-161-0/+1
* Include sysemu/reset.h a lot lessMarkus Armbruster2019-08-161-0/+1
* Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster2019-06-121-0/+2
* ppc/pnv: POWER9 XSCOM quad supportCédric Le Goater2019-03-121-0/+87
* ppc/pnv: extend XSCOM core support for POWER9Cédric Le Goater2019-03-121-13/+87
* ppc/pnv: change the CPU machine_data presenter type to Object *Cédric Le Goater2019-03-121-1/+1
* ppc/pnv: introduce a CPU machine_dataCédric Le Goater2019-02-041-1/+11
* ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPUCédric Le Goater2019-01-091-1/+1
* spapr: modify the prototype of the cpu_intc_create() methodCédric Le Goater2019-01-091-1/+1
* error: Fix use of error_prepend() with &error_fatal, &error_abortMarkus Armbruster2018-10-191-2/+2
* ppc/pnv: fix pnv_core_realize() error handlingCédric Le Goater2018-07-031-0/+1
* ppc/pnv: introduce a new intc_create() operation to the chip modelCédric Le Goater2018-06-211-9/+9
* pnv: Add cpu unrealize pathDavid Gibson2018-06-161-0/+21
* pnv: Clean up cpu realize pathDavid Gibson2018-06-161-35/+21
* pnv_core: Allocate cpu thread objects individuallyDavid Gibson2018-06-161-6/+5