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path: root/include/hw/riscv/boot.h (follow)
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* hw/riscv/boot.c: make riscv_load_initrd() staticDaniel Henrique Barboza2023-02-161-1/+0
* hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()Daniel Henrique Barboza2023-02-161-0/+1
* hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()Daniel Henrique Barboza2023-02-161-0/+1
* hw/riscv: change riscv_compute_fdt_addr() semanticsDaniel Henrique Barboza2023-02-071-1/+1
* hw/riscv: split fdt address calculation from fdt loadDaniel Henrique Barboza2023-02-071-1/+3
* hw/riscv/boot.c: use MachineState in riscv_load_kernel()Daniel Henrique Barboza2023-01-201-1/+1
* hw/riscv/boot.c: use MachineState in riscv_load_initrd()Daniel Henrique Barboza2023-01-201-2/+1
* hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()Daniel Henrique Barboza2023-01-201-2/+2
* hw/riscv/boot.c: Introduce riscv_find_firmware()Bin Meng2023-01-201-0/+2
* hw/riscv/boot.c: introduce riscv_default_firmware_name()Daniel Henrique Barboza2023-01-201-0/+1
* hw/riscv/boot.c: make riscv_find_firmware() staticDaniel Henrique Barboza2023-01-201-1/+0
* hw/riscv: virt: Enable booting S-mode firmware from pflashSunil V L2022-10-141-0/+1
* hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()Daniel Henrique Barboza2022-09-071-1/+1
* hw/riscv: boot: Support 64bit fdt address.Dylan Jhong2022-04-221-2/+2
* hw/riscv: Remove macros for ELF BIOS image namesAnup Patel2022-01-211-2/+0
* target/riscv: Support start kernel directly by KVMYifei Jiang2022-01-211-0/+1
* hw/riscv: boot: Add a PLIC config string functionAlistair Francis2021-10-281-0/+2
* hw/riscv: Use macros for BIOS image namesBin Meng2021-06-081-0/+5
* riscv: Pass RISCVHartArrayState by pointerAlistair Francis2021-01-161-3/+3
* hw/riscv: Use the CPU to determine if 32-bitAlistair Francis2020-12-171-3/+5
* hw/riscv: boot: Remove compile time XLEN checksAlistair Francis2020-12-171-3/+5
* hw/riscv: Load the kernel after the firmwareAlistair Francis2020-10-221-0/+3
* hw/riscv: Add a riscv_is_32_bit() functionAlistair Francis2020-10-221-0/+2
* hw/riscv: Return the end address of the loaded firmwareAlistair Francis2020-10-221-4/+4
* riscv: Add opensbi firmware dynamic supportAtish Patra2020-07-131-1/+4
* RISC-V: Copy the fdt in dram instead of ROMAtish Patra2020-07-131-1/+3
* riscv: Unify Qemu's reset vector code pathAtish Patra2020-07-131-0/+2
* riscv/boot: Add a missing header includeAlistair Francis2020-06-031-0/+1
* hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()Anup Patel2020-04-291-2/+4
* hw/riscv: Add optional symbol callback ptr to riscv_load_kernel()Zhuang, Siwei (Data61, Kensington NSW)2019-11-251-1/+2
* riscv: Add a helper routine for finding firmwareBin Meng2019-09-171-0/+1
* include: Make headers more self-containedMarkus Armbruster2019-08-161-0/+2
* hw/riscv: Load OpenSBI as the default firmwareAlistair Francis2019-07-181-0/+3
* hw/riscv: Add support for loading a firmwareAlistair Francis2019-06-271-0/+2
* hw/riscv: Split out the boot functionsAlistair Francis2019-06-271-0/+27