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| * aio-posix: Separate AioPolledEvent per AioHandlerKevin Wolf2025-03-131-1/+0
| * aio: Create AioPolledEventKevin Wolf2025-03-131-1/+5
| * file-posix: Support FUA writesKevin Wolf2025-03-131-2/+17
| * block: Remove unused blk_op_is_blocked()Kevin Wolf2025-03-111-1/+0
* | Merge tag 'hw-misc-20250312' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2025-03-135-3/+18
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| * | hw/sd/sdhci: Remove need for SDHCI_VENDOR_IMX definitionPhilippe Mathieu-Daudé2025-03-121-1/+0
| * | hw/hyperv/hyperv-proto: Move SYNDBG definitions from target/i386Pierrick Bouvier2025-03-111-0/+12
| * | hw/acpi: Introduce acpi_builtin() helperPhilippe Mathieu-Daudé2025-03-111-0/+3
| * | system: Replace arch_type global by qemu_arch_available() helperPhilippe Mathieu-Daudé2025-03-111-1/+1
| * | hw/xen/hvm: Fix Aarch64 typoPhilippe Mathieu-Daudé2025-03-111-1/+1
| * | hw/sd/sdhci: Set reset value of interrupt registersBALATON Zoltan2025-03-111-0/+1
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* | Merge tag 'pull-vfio-20250311' of https://github.com/legoater/qemu into stagingStefan Hajnoczi2025-03-132-3/+3
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| * | system: Declare qemu_[min/max]rampagesize() in 'system/hostmem.h'Philippe Mathieu-Daudé2025-03-112-3/+3
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* | spapr: Generate random HASHPKEYR for spapr machinesNicholas Piggin2025-03-111-0/+1
* | spapr: nested: Add support for reporting Hostwide state counterVaibhav Jain2025-03-111-6/+61
* | ppc: spapr: Enable 2nd DAWR on Power10 pSeries machineShivaprasad G Bhat2025-03-111-1/+5
* | hw/ssi/pnv_spi: Put a limit to RDR match failuresChalapathi V2025-03-111-0/+1
* | hw/ssi/pnv_spi: Make bus names distinct for each controllers of a socketChalapathi V2025-03-111-1/+2
* | hw/ssi/pnv_spi: Replace PnvXferBuffer with Fifo8 structureChalapathi V2025-03-111-0/+3
* | ppc/xive2: Check crowd backlog when scanning group backlogFrederic Barrat2025-03-111-0/+4
* | ppc/xive2: Support crowd-matching when looking for targetFrederic Barrat2025-03-112-6/+7
* | ppc/xive2: Add support for MMIO operations on the NVPG/NVC BARFrederic Barrat2025-03-112-0/+12
* | ppc/xive2: Process group backlog when updating the CPPRFrederic Barrat2025-03-111-0/+4
* | ppc/xive2: Add undelivered group interrupt to backlogFrederic Barrat2025-03-112-0/+6
* | ppc/xive2: Support group-matching when looking for targetFrederic Barrat2025-03-112-5/+7
* | ppc/xive2: Add grouping level to notificationFrederic Barrat2025-03-112-7/+27
* | ppc/xive: Rename ipb_to_pipr() to xive_ipb_to_pipr()Michael Kowal2025-03-111-4/+12
* | ppc/xive2: Update NVP save/restore for group attributesFrederic Barrat2025-03-111-3/+7
* | ppc/pnv: Move PNOR to offset 0 in the ISA FW spaceNicholas Piggin2025-03-111-2/+4
* | ppc/pnv/occ: Implement a basic dynamic OCC modelNicholas Piggin2025-03-111-0/+3
* | ppc/pnv: Make HOMER memory a RAM regionNicholas Piggin2025-03-112-4/+7
* | ppc/pnv/homer: class-based base and sizeNicholas Piggin2025-03-112-5/+8
* | ppc/pnv/phb4: Add pervasive chiplet support to PHB4/5Nicholas Piggin2025-03-112-0/+9
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* Merge tag 'migration-20250310-pull-request' of https://gitlab.com/farosas/qem...Stefan Hajnoczi2025-03-112-0/+4
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| * migration: ram block cpr blockersSteve Sistare2025-03-102-0/+4
* | Merge tag 'pull-xen-20250310' of https://xenbits.xen.org/git-http/people/aper...Stefan Hajnoczi2025-03-111-0/+4
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| * | xen/passthrough: use gsi to map pirq when dom0 is PVHJiqian Chen2025-03-101-0/+4
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* | Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into stagingStefan Hajnoczi2025-03-111-2/+3
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| * | util/iov: Do not assert offset is in iovAkihiko Odaki2025-03-101-2/+3
* | | include/qemu: plugin-memory.h doesn't need cpu-defs.hAlex Bennée2025-03-101-1/+0
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* | Merge tag 'accel-cpus-20250309' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2025-03-104-22/+51
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| * | cpus: Remove CPUClass::has_work() handlerPhilippe Mathieu-Daudé2025-03-092-3/+2
| * | cpus: Introduce SysemuCPUOps::has_work() handlerPhilippe Mathieu-Daudé2025-03-092-1/+5
| * | cpus: Un-inline cpu_has_work()Philippe Mathieu-Daudé2025-03-091-5/+1
| * | cpus: Restrict cpu_has_work() to system emulationPhilippe Mathieu-Daudé2025-03-091-14/+14
| * | cpus: Prefer cached CpuClass over CPU_GET_CLASS() macroPhilippe Mathieu-Daudé2025-03-091-7/+3
| * | cpus: Register VMState per user / system emulationPhilippe Mathieu-Daudé2025-03-091-0/+2
| * | user: Extract common MMAP API to 'user/mmap.h'Philippe Mathieu-Daudé2025-03-091-0/+32
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* | hw/arm/aspeed_ast27x0: Support two levels of INTC controllers for AST2700 A1Jamin Lin2025-03-091-0/+1
* | hw/arm/aspeed_ast27x0: Define an Array of AspeedINTCState with Two InstancesJamin Lin2025-03-091-1/+1