index
:
focaccia-qemu
this commit
master
sr/plugin
ta/focaccia
Unnamed repository; edit this file 'description' to name the repository.
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
target
/
arm
/
cpu-param.h
(
follow
)
Commit message (
Expand
)
Author
Age
Files
Lines
*
target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'
Philippe Mathieu-Daudé
2024-04-26
1
-2
/
+4
*
target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only
Richard Henderson
2024-02-29
1
-1
/
+5
*
target/arm: Replace TARGET_PAGE_ENTRY_EXTRA
Anton Johansson
2023-10-03
1
-12
/
+0
*
target/arm: Remove `NB_MMU_MODES` define
Anton Johansson
2023-03-13
1
-2
/
+0
*
target/arm: Remove `TARGET_TB_PCREL` define
Anton Johansson
2023-03-01
1
-2
/
+0
*
target/arm: Enable TARGET_TB_PCREL
Richard Henderson
2022-10-20
1
-0
/
+2
*
target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idx
Richard Henderson
2022-10-20
1
-1
/
+1
*
target/arm: Add ARMMMUIdx_Phys_{S,NS}
Richard Henderson
2022-10-20
1
-1
/
+1
*
target/arm: Use probe_access_full for BTI
Richard Henderson
2022-10-20
1
-4
/
+5
*
target/arm: Enable TARGET_PAGE_ENTRY_EXTRA
Richard Henderson
2022-10-20
1
-0
/
+12
*
target/arm: Fold secure and non-secure a-profile mmu indexes
Richard Henderson
2022-10-10
1
-1
/
+1
*
Normalize header guard symbol definition
Markus Armbruster
2022-05-11
1
-1
/
+1
*
target/arm: Implement FEAT_LPA
Richard Henderson
2022-03-02
1
-1
/
+1
*
target/arm: Implement FEAT_LVA
Richard Henderson
2022-03-02
1
-1
/
+1
*
linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
Richard Henderson
2021-02-16
1
-0
/
+3
*
target/arm: add MMU stage 1 for Secure EL2
Rémi Denis-Courmont
2021-01-19
1
-1
/
+1
*
target/arm: Don't use a TLB for ARMMMUIdx_Stage2
Peter Maydell
2020-05-04
1
-1
/
+1
*
target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled
Richard Henderson
2020-02-13
1
-1
/
+1
*
target/arm: Reorganize ARMMMUIdx
Richard Henderson
2020-02-07
1
-1
/
+1
*
tcg: Split out target/arch/cpu-param.h
Richard Henderson
2019-06-10
1
-0
/
+34