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path: root/target/arm/cpu.h (follow)
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* target/arm: Default to 1GHz cntfrq for 'max' and new CPUsPeter Maydell2024-04-301-0/+11
* target/arm: Implement ID_AA64MMFR3_EL1Peter Maydell2024-04-301-0/+17
* target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'Philippe Mathieu-Daudé2024-04-261-3/+0
* target/arm: Handle IS/FS in ISR_EL1 for NMI, VINMI and VFNMIJinjie Ruan2024-04-251-0/+2
* target/arm: Add support for Non-maskable InterruptJinjie Ruan2024-04-251-0/+6
* target/arm: Add PSTATE.ALLINTJinjie Ruan2024-04-251-0/+1
* target/arm: Implement FEAT_ECV CNTPOFF_EL2 handlingPeter Maydell2024-03-071-0/+1
* target/arm: Move some register related defines to internals.hPeter Maydell2024-03-071-128/+0
* hw/core/cpu: Remove gdb_get_dynamic_xml memberAkihiko Odaki2024-02-281-6/+0
* target/arm: Use GDBFeature for dynamic XMLAkihiko Odaki2024-02-281-11/+10
* include/exec: Implement cpu_mmu_index genericallyRichard Henderson2024-02-031-13/+0
* target/arm: Move GTimer definitions to new 'gtimer.h' headerPhilippe Mathieu-Daudé2024-01-261-7/+1
* target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' headerPhilippe Mathieu-Daudé2024-01-261-6/+0
* target/arm: Expose M-profile register bank index definitionsPhilippe Mathieu-Daudé2024-01-261-15/+0
* target/arm: Declare ARM_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'Philippe Mathieu-Daudé2024-01-261-2/+0
* target/arm: Expose arm_cpu_mp_affinity() in 'multiprocessing.h' headerPhilippe Mathieu-Daudé2024-01-261-5/+1
* target/arm: Create arm_cpu_mp_affinityRichard Henderson2024-01-261-0/+5
* target/arm: Rename arm_cpu_mp_affinityRichard Henderson2024-01-261-1/+1
* target/arm: Report VNCR_EL2 based faults correctlyPeter Maydell2024-01-091-2/+2
* target/arm: Implement FEAT_NV2 redirection of sysregs to RAMPeter Maydell2024-01-091-0/+4
* target/arm: Handle FEAT_NV2 redirection of SPSR_EL2, ELR_EL2, ESR_EL2, FAR_EL2Peter Maydell2024-01-091-0/+2
* target/arm: Implement VNCR_EL2 registerPeter Maydell2024-01-091-0/+3
* target/arm: Trap sysreg accesses for FEAT_NVPeter Maydell2024-01-091-0/+1
* target/arm: Allow use of upper 32 bits of TBFLAG_A64Peter Maydell2024-01-091-3/+5
* target/arm: Enable trapping of ERET for FEAT_NVPeter Maydell2024-01-091-1/+1
* target/arm: Use generic cpu_list()Gavin Shan2024-01-051-3/+0
* target: Move ArchCPUClass definition to 'cpu.h'Philippe Mathieu-Daudé2023-11-071-0/+25
* target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h'Philippe Mathieu-Daudé2023-11-071-0/+22
* target: Unify QOM stylePhilippe Mathieu-Daudé2023-11-071-2/+0
* target/arm: Move feature test functions to their own headerPeter Maydell2023-10-271-971/+0
* target/arm/arm-powerctl: Correctly init CPUs when powered on to lower ELPeter Maydell2023-10-191-0/+22
* accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson2023-10-031-1/+0
* target/arm: Define new TB flag for ATA0Peter Maydell2023-09-211-0/+1
* target/arm: Implement FEAT_MOPS enable bitsPeter Maydell2023-09-211-0/+6
* target/arm: Implement FEAT_HBCPeter Maydell2023-09-211-0/+5
* target/arm: Update AArch64 ID register field definitionsPeter Maydell2023-09-211-0/+23
* Merge tag 'pull-target-arm-20230908' of https://git.linaro.org/people/pmaydel...Stefan Hajnoczi2023-09-111-8/+46
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| * target/arm: Implement FEAT_TIDCP1Richard Henderson2023-09-081-0/+5
| * target/arm: Implement FEAT_PACQARMA3Richard Henderson2023-09-081-0/+1
| * target/arm: Add feature detection for FEAT_Pauth2 and extensionsAaron Lindsay2023-09-081-8/+39
| * target/arm: Add ID_AA64ISAR2_EL1Aaron Lindsay2023-09-081-0/+1
* | trivial: Simplify the spots that use TARGET_BIG_ENDIAN as a numeric valueThomas Huth2023-09-081-10/+2
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* target/arm: Allow cpu to configure GM blocksizeRichard Henderson2023-08-311-0/+2
* target/arm: Reduce dcz_blocksize to uint8_tRichard Henderson2023-08-311-1/+2
* target/arm/helper: Implement CNTHCTL_EL2.CNT[VP]MASKJean-Philippe Brucker2023-08-221-0/+4
* target/arm: Pass an ARMSecuritySpace to arm_is_el2_enabled_secstate()Peter Maydell2023-08-221-5/+8
* target/arm/ptw: Pass an ARMSecuritySpace to arm_hcr_el2_eff_secstate()Peter Maydell2023-08-221-1/+1
* arm: spelling fixesMichael Tokarev2023-07-251-1/+1
* target/arm: Restrict KVM-specific fields from ArchCPUPhilippe Mathieu-Daudé2023-06-281-0/+2
* target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson2023-06-261-2/+2