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* Add TZCNT instructionChristian Krinitsin2025-10-091-0/+9
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* Add BZHI instructionChristian Krinitsin2025-10-091-0/+3
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* Add BLSR instructionChristian Krinitsin2025-10-091-0/+3
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* Add BLSMSK instructionChristian Krinitsin2025-10-091-0/+3
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* Add BEXTR instructionChristian Krinitsin2025-10-091-0/+3
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* Add support for ANDN instructionChristian Krinitsin2025-10-091-0/+3
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* Add blsi opcode and testsChristian Krinitsin2025-10-091-0/+10
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* Fix html; Add reg testFabrice Desclaux2021-12-061-0/+1
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* x86_64 Fix multiple REX prefix instruction disasm (#1376)Konstantin Komarov2021-07-031-0/+7
| | | | Fix multiple rex prefixes
* Rename x86 lifterFabrice Desclaux2020-12-241-1/+1
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* X86: add instrFabrice Desclaux2019-11-211-0/+4
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* Add CET instructions (#1003)William Bruneau2019-04-051-0/+20
| | | | | | * Add CET instructions * Fix RDSSP
* Rename miasm2 to miasmFabrice Desclaux2019-03-051-6/+6
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* Support python2/python3Fabrice Desclaux2019-03-051-25/+30
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* Support for REP instruction prefix (#956)Vladislav Hrčka2019-02-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Added function find_path_by_successors The function find_path_by_successors does the same as function find_path, but it searches the paths from src to dst, not vice versa like find_path, which might be more efficient in some cases. * Added support for REP instruction prefix Added support for REP instruction prefix * Added support for REP instruction prefix Added support for REP instruction prefix * Added support for REP prefix According to https://c9x.me/x86/html/file_module_x86_id_279.html 0xF3AD is REP LODSD and not REPE LODSD * Added REP instruction prefix support fix Added REP instruction prefix support fix * Added REP instruction prefix support fix Added REP instruction prefix support and REPNZ, REPZ aliases * Fix of adding REP instruction prefix Fixing https://github.com/cea-sec/miasm/pull/956#discussion_r253361754. I also put https://github.com/nofiv/miasm/edit/master/miasm2/arch/x86/arch.py#diff-f7dd74dede0a04f194dff140d0976b98L739 behind the loop since it seems to be serving similar purpose. * Fix of the added REP intruction prefix Fixing https://github.com/cea-sec/miasm/pull/956#discussion_r253361339 * Discard changes Creating another PR for this * Update arch.py
* Add ENDBR64 and ENDBR32 instructionsWilliam Bruneau2019-02-051-0/+5
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* X86: fix inc/dec 64bitFabrice Desclaux2018-10-061-0/+6
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* X86: add nop formFabrice Desclaux2018-08-161-0/+4
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* Add new SSE instruction description and updates old onesAjax2018-07-101-1/+39
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* symbol_pool -> loc_dbAjax2018-07-031-3/+3
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* Code cleaning: remove useless / commented codeAjax2018-06-211-7/+0
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* Core: updt parser structureFabrice Desclaux2018-05-141-55/+5
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* X86/sem: fix cmpxchg semFabrice Desclaux2018-04-081-1/+1
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* Add EMMS, implemtend as a NOPAjax2018-02-091-0/+3
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* Add MASKMOVQ/MASKMOVDQU instructionAjax2018-02-091-0/+5
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* Fix PEXTRW 0F C5 formAjax2018-02-091-4/+4
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* Add PAVGB/PAVGW instructionAjax2018-02-091-0/+10
| | | | | | | 0F E0 /r PAVGB mm1, mm2/m64 66 0F E0, /r PAVGB xmm1, xmm2/m128 0F E3 /r PAVGW mm1, mm2/m64 66 0F E3 /r PAVGW xmm1, xmm2/m128
* Add PSADBW instructionAjax2018-02-091-0/+5
| | | | | 0F F6 /r PSADBW mm1, mm2/m64 66 0F F6 /r PSADBW xmm1, xmm2/m128
* Add PMADDWD instructionAjax2018-02-091-0/+5
| | | | | 0F F5 /r PMADDWD mm, mm/m64 66 0F F5 /r PMADDWD xmm1, xmm2/m128
* Add PMULUDQ instructionAjax2018-02-091-0/+5
| | | | | NP 0F F4 /r PMULUDQ mm1, mm2/m64 66 0F F4 /r PMULUDQ xmm1, xmm2/m128
* Add PMAXSW instructionAjax2018-02-091-0/+5
| | | | | 0F EE /r PMAXSW mm1, mm2/m64 66 0F EE /r PMAXSW xmm1, xmm2/m128
* Add PADDSB/PADDSW instructionAjax2018-02-091-0/+10
| | | | | | | NP 0F EC /r PADDSB mm, mm/m64 66 0F EC /r PADDSB xmm1, xmm2/m128 NP 0F ED /r PADDSW mm, mm/m64 66 0F ED /r PADDSW xmm1, xmm2/m128
* Add PSUBSB/PSUBSW instructionAjax2018-02-091-0/+10
| | | | | | | NP 0F E8 /r PSUBSB mm, mm/m64 66 0F E8 /r PSUBSB xmm1, xmm2/m128 NP 0F E9 /r PSUBSW mm, mm/m64 66 0F E9 /r PSUBSW xmm1, xmm2/m128
* Add PMULHW / PMULHUW instructionAjax2018-02-091-0/+10
| | | | | | | 0F E5 /r PMULHW mm, mm/m64 66 0F E5 /r PMULHW xmm1, xmm2/m128 NP 0F E4 /r PMULHUW mm1, mm2/m64 66 0F E4 /r PMULHUW xmm1, xmm2/m128
* Add PADDUSB/PADDUSW instructionAjax2018-02-091-0/+9
| | | | | 0F DC /r PADDUSB mm, mm/m64 66 0F DC /r PADDUSB xmm1, xmm2/m128
* Add PSUBSUB/PSUBUSW instrAjax2018-02-091-0/+11
| | | | | 0F D8 /r PSUBUSB mm, mm/m64 66 0F D8 /r PSUBUSB xmm1, xmm2/m128
* Add PMULLW instructionAjax2018-02-091-0/+5
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* Add PACKSSDW instructionAjax2018-02-091-0/+5
| | | | | 0F 6B /r PACKSSDW mm1, mm2/m64 66 0F 6B /r PACKSSDW xmm1, xmm2/m128
* Add PACKUSWB instructionAjax2018-02-091-0/+5
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* Add PACKSSWB instructionAjax2018-02-091-0/+4
| | | | | 0F 63 /r PACKSSWB mm1, mm2/m64 66 0F 63 /r PACKSSWB xmm1, xmm2/m128
* Add PCMPGTB instructionAjax2018-01-261-0/+3
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* Add PALIGNR x86 instruction (asm & semantic)Ajax2018-01-261-0/+3
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* Add support for BNDMOV instruction (with an empty semantic)Ajax2018-01-261-0/+5
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* X86: add mfence/sfence/prefetchFabrice Desclaux2017-12-301-0/+4
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* update tests to use the new spacing of expressions' str()Aymeric Vincent2017-12-121-255/+255
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* X86: add instr pcmpFabrice Desclaux2017-09-011-0/+6
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* X86: add instr aesFabrice Desclaux2017-09-011-0/+9
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* X86: fix sib generationFabrice Desclaux2017-09-011-0/+8
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* Remove PYTHONSTARTUP in end-user scriptsAjax2017-04-241-4/+0
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* Core/cpu: change ParseAst nameFabrice Desclaux2017-02-131-2/+2
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