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path: root/src/dynarec/dynarec_arm64_helper.h (follow)
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* [DYNAREC] Refactored dynarec to ease the future adding of new target ↵ptitSeb2022-02-271-1087/+0
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* Fixed the CVTPD2DQ dynarec opcoderajdakin2022-02-141-4/+8
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* Fixed a typo in TBZ_MARK and TBNZ_MARK emitter (fixed infinite loop in ↵ptitSeb2022-01-091-2/+2
| | | | Ex-Zodiac Demo)
* [DYNAREC] Fixed some border case for IDIV opcodeptitSeb2021-12-221-0/+12
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* [DYNAREC] Pass0 now alocate memory and do more stuff from pass1ptitSeb2021-11-111-23/+23
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* [DYNAREC] Added 67 89/C1/F7 opcodesptitSeb2021-10-051-1/+36
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* Added AES-NI cpu extension support ([DYNAREC] too, using AES extension if ↵ptitSeb2021-08-281-0/+3
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* Added 64 F7 opcode ([DYNAREC] too) (for #73)ptitSeb2021-07-271-1/+11
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* [DYNAREC] Added 64 FF opcodes (for geekbench5)ptitSeb2021-07-081-0/+9
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* [DYNAREC] Added DC opcodes (for CB15)ptitSeb2021-07-051-1/+1
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* [DYNAREC] Improved the fast native call pathptitSeb2021-07-021-3/+3
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* [DYNAREC] Added CF opcode and optimized native callptitSeb2021-06-281-3/+5
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* [DYNAREC] Optimized DIV/IDIV 32/64bits opcodesptitSeb2021-06-181-0/+10
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* [DYNAREC] Added shrd32c emiter and 0F AC opcodeptitSeb2021-06-141-1/+1
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* [DYNAREC] Added shld32c emiter and 0F A4 opcodeptitSeb2021-06-141-1/+1
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* [DYNAREC] Improved flag handlingptitSeb2021-06-121-4/+6
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* Added suport for arch_prctl syscall, and GL segment handling ([DYNAREC] too)ptitSeb2021-06-071-1/+1
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* [DYNAREC] Small optimisation on handling of relative addressingptitSeb2021-06-061-2/+2
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* [DYNAREC] Fixed potential issue with longjmp native function callptitSeb2021-06-061-1/+7
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* Added 64 80 opcodes ([DYNAREC] too)ptitSeb2021-05-211-13/+18
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* Added E0..E3 opcodes ([DYNAREC] too)ptitSeb2021-04-161-0/+8
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* Second passrajdakin2021-04-141-90/+90
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* [DYNAREC] Improved (and fixed) Table64 handlingptitSeb2021-04-111-2/+8
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* [DYNAREC] Needed to same a bit more register before native funciton call ↵ptitSeb2021-04-071-0/+7
| | | | (fix setjmp no saving all registers)
* [DYNAREC] Added 66 64 8B opcodeptitSeb2021-04-041-0/+2
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* [DYNAREC] Added DF opcodesptitSeb2021-04-031-1/+5
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* [DYNAREC] Added DD opcodesptitSeb2021-04-031-1/+1
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* [DYNAREC] Added D8 opcodesptitSeb2021-04-031-1/+1
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* [DYNAREC] Added DB opcodesptitSeb2021-04-031-1/+4
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* [DYNAREC] Added D9 opcodesptitSeb2021-04-031-3/+6
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* [DYNAREC] Better 0F 77 EMMS emulationptitSeb2021-04-031-0/+3
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* [DYNAREC] Fixed 67 8D opcde, and remove hack for 67 REX.W, it was wrongptitSeb2021-04-011-0/+4
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* [DYNAREC] Try to mitigate case of cmp/tst apparently 'for nothing'ptitSeb2021-03-291-0/+1
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* [DYNAREC] Fixed a nasty bug in GETGB macroptitSeb2021-03-251-1/+1
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* Added F3 0F BC opcode ([DYNAREC] too)ptitSeb2021-03-251-0/+4
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* [DYNAREC] Added some mecanism to handle weird 66 REX mixingptitSeb2021-03-251-1/+1
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* [DYNAREC] Added 0F BA opcodeptitSeb2021-03-241-0/+8
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* [DYNAREC] Added F2 0F 2D opcodes, and use a simpler version of the ↵ptitSeb2021-03-241-0/+3
| | | | conversions (but complex one is still available under a define in dynarec_arm64_helper.h)
* [DYNAREC] Added 64 83 opcodesptitSeb2021-03-241-1/+1
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* [DYNAREC] Added 0F 58/59 opcodes, plus lots of small bugfix (IntoTheBreach ↵ptitSeb2021-03-231-1/+5
| | | | sounds good now)
* [DYNAREC] Optimized F2/F3 AE/A6 opcodesptitSeb2021-03-231-2/+10
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* [DYNAREC] Added (F2/F3) A6 opcodeptitSeb2021-03-221-0/+4
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* [DYNAREC] Small option on REP MOVSD, and go back to LDAXR/STLXR for xchg ↵ptitSeb2021-03-221-0/+4
| | | | (IntoTheBreach seems to prefer)
* [DYNAREC] Added (F2/F3) A5 opcodeptitSeb2021-03-221-4/+4
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* [DYNAREC] Fixed and simplified F0 B1 opcdes, plus some other various small ↵ptitSeb2021-03-221-3/+3
| | | | improvments (IntoTheBreach still unstable, the other 3 works fine)
* [DYNAREC] Added 64 8B opcodes, plus some fixes to FS accessptitSeb2021-03-221-4/+4
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* [DYNAREC] Added 64 31 opcodeptitSeb2021-03-221-16/+14
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* [DYNAREC] Added F0 B1 opcode (and change LDAXR/STLXR to LDXR/STXR for ↵ptitSeb2021-03-221-19/+35
| | | | eXclusive access)
* [DYNAREC] Added 87 XCHG opcodeptitSeb2021-03-221-0/+8
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* [DYNAREC] Optimized a bit Native call push/pop regsptitSeb2021-03-211-6/+5
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