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authorVijaya Kumar K <Vijaya.Kumar@cavium.com>2017-02-23 17:21:12 +0530
committerPeter Maydell <peter.maydell@linaro.org>2017-02-28 17:10:00 +0000
commitd3a3e529626fbee5cf0fb33414a85c9493adc280 (patch)
tree4b110116b22e9f450f3a746a6f049a6f8139180d /hw/intc/arm_gicv3_common.c
parent367b9f527becdd20ddf116e17a3c0c2bbc486920 (diff)
downloadfocaccia-qemu-d3a3e529626fbee5cf0fb33414a85c9493adc280.tar.gz
focaccia-qemu-d3a3e529626fbee5cf0fb33414a85c9493adc280.zip
target-arm: Add GICv3CPUState in CPUARMState struct
Add gicv3state void pointer to CPUARMState struct
to store GICv3CPUState.

In case of usecase like CPU reset, we need to reset
GICv3CPUState of the CPU. In such scenario, this pointer
becomes handy.

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@cavium.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 1487850673-26455-5-git-send-email-vijay.kilari@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/arm_gicv3_common.c')
-rw-r--r--hw/intc/arm_gicv3_common.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 5b0e456383..c6493d6c07 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -252,6 +252,8 @@ static void arm_gicv3_common_realize(DeviceState *dev, Error **errp)
 
         s->cpu[i].cpu = cpu;
         s->cpu[i].gic = s;
+        /* Store GICv3CPUState in CPUARMState gicv3state pointer */
+        gicv3_set_gicv3state(cpu, &s->cpu[i]);
 
         /* Pre-construct the GICR_TYPER:
          * For our implementation: