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| author | Shlomo Pongratz <shlomo.pongratz@huawei.com> | 2016-06-17 15:23:47 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-17 15:23:51 +0100 |
| commit | cec93a938a7e84477be0be3ea428717f44dd5f1d (patch) | |
| tree | a423e847c872596192d8a8ee2c01c18da42d71ab /hw/intc/arm_gicv3_cpuif.c | |
| parent | e52af5134035b0fa6d257f68456f6fa8655c86d3 (diff) | |
| download | focaccia-qemu-cec93a938a7e84477be0be3ea428717f44dd5f1d.tar.gz focaccia-qemu-cec93a938a7e84477be0be3ea428717f44dd5f1d.zip | |
hw/intc/arm_gicv3: Implement GICv3 redistributor registers
Implement the redistributor registers of a GICv3. Signed-off-by: Shlomo Pongratz <shlomo.pongratz@huawei.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1465915112-29272-13-git-send-email-peter.maydell@linaro.org [PMM: significantly overhauled/rewritten: * use the new data structures * restructure register read/write to handle different width accesses natively, since almost all registers are 32-bit only, rather than implementing everything as byte accesses * implemented security extension support ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/arm_gicv3_cpuif.c')
0 files changed, 0 insertions, 0 deletions