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path: root/hw/arm/xlnx-versal.c (follow)
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* hw/arm/xlnx-versal: add versal2 SoCLuc Michel2025-10-071-14/+193
* hw/arm/xlnx-versal: add the target field in IRQ descriptorLuc Michel2025-10-071-2/+39
* hw/arm/xlnx-versal: add a per_cluster_gic switch to VersalCpuClusterMapLuc Michel2025-10-071-2/+13
* hw/arm/xlnx-versal: tidy upLuc Michel2025-10-071-21/+7
* hw/arm/xlnx-versal: use hw/arm/bsa.h for timer IRQ indicesLuc Michel2025-10-071-11/+17
* hw/arm/xlnx-versal: reconnect the CRL to the other devicesLuc Michel2025-10-071-1/+30
* hw/arm/xlnx-versal: add the versal_get_num_cpu accessorLuc Michel2025-10-071-0/+8
* hw/arm/xlnx-versal: ddr: refactor creationLuc Michel2025-10-071-24/+49
* hw/arm/xlnx-versal: ocm: refactor creationLuc Michel2025-10-071-4/+16
* hw/arm/xlnx-versal: rpu: refactor creationLuc Michel2025-10-071-35/+25
* hw/arm/xlnx-versal: add support for GICv2Luc Michel2025-10-071-20/+62
* hw/arm/xlnx-versal: add support for multiple GICsLuc Michel2025-10-071-4/+52
* hw/arm/xlnx-versal: instantiate the GIC ITS in the APULuc Michel2025-10-071-0/+50
* hw/arm/xlnx-versal: add the mp_affinity property to the CPU mappingLuc Michel2025-10-071-0/+16
* hw/arm/xlnx-versal: refactor CPU cluster creationLuc Michel2025-10-071-86/+268
* hw/arm/xlnx-versal-virt: virtio: refactor creationLuc Michel2025-10-071-0/+26
* hw/arm/xlnx-versal: crl: refactor creationLuc Michel2025-10-071-17/+19
* hw/arm/xlnx-versal: cfu: refactor creationLuc Michel2025-10-071-141/+113
* hw/arm/xlnx-versal: rtc: refactor creationLuc Michel2025-10-071-9/+31
* hw/arm/xlnx-versal: trng: refactor creationLuc Michel2025-10-071-8/+10
* hw/arm/xlnx-versal: bbram: refactor creationLuc Michel2025-10-071-12/+29
* hw/arm/xlnx-versal: PMC IOU SCLR: refactor creationLuc Michel2025-10-071-20/+28
* hw/arm/xlnx-versal: VersalMap: add support for OR'ed IRQsLuc Michel2025-10-071-1/+62
* hw/arm/xlnx-versal: ospi: refactor creationLuc Michel2025-10-071-61/+81
* hw/arm/xlnx-versal: efuse: refactor creationLuc Michel2025-10-071-28/+50
* hw/arm/xlnx-versal: usb: refactor creationLuc Michel2025-10-071-13/+61
* hw/arm/xlnx-versal: xram: refactor creationLuc Michel2025-10-071-24/+35
* hw/arm/xlnx-versal: adma: refactor creationLuc Michel2025-10-071-25/+49
* hw/arm/xlnx-versal: gem: refactor creationLuc Michel2025-10-071-40/+117
* hw/arm/xlnx-versal: sdhci: refactor creationLuc Michel2025-10-071-21/+75
* hw/arm/xlnx-versal: canfd: refactor creationLuc Michel2025-10-071-27/+67
* hw/arm/xlnx-versal: uart: refactor creationLuc Michel2025-10-071-29/+121
* hw/arm/xlnx-versal: prepare for FDT creationLuc Michel2025-10-071-0/+24
* hw/arm/xlnx-versal: split the xlnx-versal typeLuc Michel2025-10-071-7/+24
* qom: Have class_init() take a const data argumentPhilippe Mathieu-Daudé2025-04-251-1/+1
* hw/arm/xlnx-versal: prepare compilation unit to be commonPierrick Bouvier2025-04-231-2/+0
* qapi: Move include/qapi/qmp/ to include/qobject/Daniel P. Berrangé2025-02-101-1/+1
* Merge tag 'exec-20241220' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2024-12-211-2/+2
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| * include: Rename sysemu/ -> system/Philippe Mathieu-Daudé2024-12-201-2/+2
* | include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LISTRichard Henderson2024-12-191-1/+0
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* hw/arm: Constify all PropertyRichard Henderson2024-12-151-1/+1
* hw/arm/xlnx: Connect secondary CGEM IRQsKinsey Moore2024-10-011-1/+11
* hw/arm: use qemu_configure_nic_device()David Woodhouse2024-02-021-6/+1
* target/arm: Move GTimer definitions to new 'gtimer.h' headerPhilippe Mathieu-Daudé2024-01-261-0/+1
* target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' headerPhilippe Mathieu-Daudé2024-01-261-0/+1
* hw/arm/xlnx-versal: Use qdev_prop_set_array()Kevin Wolf2023-11-101-2/+7
* hw/arm: xlnx-versal-virt: Add AMD/Xilinx TRNG deviceTong Ho2023-11-021-0/+16
* hw/arm/versal: Connect the CFRAME_REG and CFRAME_BCAST_REGFrancisco Iglesias2023-09-081-1/+112
* hw/arm/xlnx-versal: Connect the CFU_APB, CFU_FDRO and CFU_SFRFrancisco Iglesias2023-09-081-0/+42
* Merge tag 'pull-target-arm-20230606' of https://git.linaro.org/people/pmaydel...Richard Henderson2023-06-061-0/+37
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