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path: root/hw/misc/aspeed_sbc.c (follow)
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* hw/misc/aspeed_sbc: Handle OTP write command for voltage mode registersKane-Chen-AS2025-09-291-0/+41
* hw/misc/aspeed_sbc: Add CAMP2 support for OTP data readsKane-Chen-AS2025-09-291-0/+27
* hw/arm: Integrate ASPEED OTP memory support into AST1030 SoCsKane-Chen-AS2025-09-291-0/+16
* hw/arm: Integrate ASPEED OTP memory support into AST2600 SoCsKane-Chen-AS2025-09-291-0/+2
* hw/misc/aspeed_sbc: Connect ASPEED OTP memory device to SBCKane-Chen-AS2025-09-291-0/+111
* qom: Have class_init() take a const data argumentPhilippe Mathieu-Daudé2025-04-251-2/+2
* include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LISTRichard Henderson2024-12-191-1/+0
* hw/misc: Constify all PropertyRichard Henderson2024-12-151-1/+1
* hw: Use device_class_set_legacy_reset() instead of opencodingPeter Maydell2024-09-131-1/+1
* hw/misc: Constify VMStateRichard Henderson2023-12-301-1/+1
* aspeed: sbc: Allow per-machine settingsJoel Stanley2022-07-141-2/+40
* aspeed: sbc: Correct default reset valuesJoel Stanley2022-05-021-2/+5
* ast2600: Add Secure Boot Controller modelJoel Stanley2022-02-261-0/+141