| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | tcg: Introduce TCG_TARGET_HAS_tst | Richard Henderson | 2024-02-03 | 1 | -0/+2 |
| * | tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} | Richard Henderson | 2023-11-06 | 1 | -2/+0 |
| * | tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64} | Richard Henderson | 2023-11-06 | 1 | -2/+0 |
| * | tcg/riscv: Implement negsetcond_* | Richard Henderson | 2023-08-24 | 1 | -2/+2 |
| * | tcg: Introduce negsetcond opcodes | Richard Henderson | 2023-08-24 | 1 | -0/+2 |
| * | tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32 | Richard Henderson | 2023-08-24 | 1 | -2/+1 |
| * | tcg: Split out tcg-target-reg-bits.h | Richard Henderson | 2023-06-05 | 1 | -9/+0 |
| * | tcg: Remove TCG_TARGET_TLB_DISPLACEMENT_BITS | Richard Henderson | 2023-05-30 | 1 | -1/+0 |
| * | tcg/riscv: Support CTZ, CLZ from Zbb | Richard Henderson | 2023-05-25 | 1 | -4/+4 |
| * | tcg/riscv: Implement movcond | Richard Henderson | 2023-05-25 | 1 | -2/+2 |
| * | tcg/riscv: Support CPOP from Zbb | Richard Henderson | 2023-05-25 | 1 | -2/+2 |
| * | tcg/riscv: Support REV8 from Zbb | Richard Henderson | 2023-05-25 | 1 | -5/+5 |
| * | tcg/riscv: Support rotates from Zbb | Richard Henderson | 2023-05-25 | 1 | -2/+2 |
| * | tcg/riscv: Support ANDN, ORN, XNOR from Zbb | Richard Henderson | 2023-05-25 | 1 | -6/+6 |
| * | tcg/riscv: Probe for Zba, Zbb, Zicond extensions | Richard Henderson | 2023-05-25 | 1 | -0/+6 |
| * | tcg: Add INDEX_op_qemu_{ld,st}_i128 | Richard Henderson | 2023-05-16 | 1 | -0/+2 |
| * | tcg: Introduce tcg_target_has_memory_bswap | Richard Henderson | 2023-05-16 | 1 | -2/+0 |
| * | tcg/riscv: Require TCG_TARGET_REG_BITS == 64 | Richard Henderson | 2023-05-05 | 1 | -13/+9 |
| * | tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128 | Richard Henderson | 2023-02-04 | 1 | -0/+3 |
| * | tcg: Remove TCG_TARGET_HAS_direct_jump | Richard Henderson | 2023-01-17 | 1 | -1/+0 |
| * | tcg: Move tb_target_set_jmp_target declaration to tcg.h | Richard Henderson | 2023-01-17 | 1 | -4/+0 |
| * | tcg: Change tb_target_set_jmp_target arguments | Richard Henderson | 2023-01-17 | 1 | -1/+2 |
| * | tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 | Richard Henderson | 2023-01-05 | 1 | -0/+1 |
| * | tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 | Richard Henderson | 2023-01-05 | 1 | -1/+5 |
| * | tcg/riscv: Support raising sigbus for user-only | Richard Henderson | 2022-02-09 | 1 | -2/+0 |
| * | tcg: Remove TCG_TARGET_HAS_goto_ptr | Richard Henderson | 2021-07-09 | 1 | -1/+0 |
| * | tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h | Richard Henderson | 2021-06-11 | 1 | -0/+1 |
| * | tcg: Remove TCG_TARGET_SUPPORT_MIRROR | Richard Henderson | 2021-01-07 | 1 | -1/+0 |
| * | tcg/riscv: Support split-wx code generation | Richard Henderson | 2021-01-07 | 1 | -1/+1 |
| * | tcg: Add --accel tcg,split-wx property | Richard Henderson | 2021-01-07 | 1 | -0/+1 |
| * | tcg: Adjust tb_target_set_jmp_target for split-wx | Richard Henderson | 2021-01-07 | 1 | -1/+1 |
| * | tcg: Introduce INDEX_op_qemu_st8_i32 | Richard Henderson | 2021-01-07 | 1 | -0/+1 |
| * | util: Extract flush_icache_range to cacheflush.c | Richard Henderson | 2021-01-02 | 1 | -5/+0 |
| * | tcg: Add INDEX_op_extract2_{i32,i64} | Richard Henderson | 2019-04-24 | 1 | -0/+2 |
| * | tcg/riscv: Add the tcg-target.h file | Alistair Francis | 2018-12-26 | 1 | -0/+177 |