| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | [INTERP] Yet another opcode name comment fix | ptitSeb | 2025-04-24 | 1 | -1/+1 | |
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| * | [SIGNAL] Better signal logging when trace enabled (#2572) | Yang Liu | 2025-04-24 | 1 | -2/+11 | |
| | | | | | | * [SIGNAL] Better signal logging when trace enabled * fix | |||||
| * | [RV64_DYNAREC] Fixed x87 cache swapping (#2571) | Yang Liu | 2025-04-24 | 2 | -9/+11 | |
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| * | [ARM64_DYNAREC] Small optim on (V)PACKUSDW opcodes | ptitSeb | 2025-04-24 | 2 | -14/+4 | |
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| * | [LA64_DYNAREC] Add/Opt more mmx/sse ops (#2565) | phorcys | 2025-04-24 | 2 | -46/+180 | |
| | | | | | | | | | | | | | | | | * [LA64_DYNAREC] Add/Opt PEXTR{B,W,D,Q}/PINSR{B,W,D,Q} . * 0f.c4/c5 PINSRW/PEXTRW mmx ops. * 66.0f.3a.14/15/16 PEXTR{B,W,D/Q} SSE4 ops. * 66.0f.c4/c5 PINSRW/PEXTRW sse ops. * [LA64_DYNAREC] Add more SSE3/SSE4 ops 66.0f.38.28 PMULDQ 66.0f.38.2a MOVNTDQA 66.0f.38.37 PCMPGTQ 66.0f.38.38/3b/3c/3f PMINSB/PMINUD/PMAXSB/PMAXUD 66.0f.3a.17 EXTRACTPS 66.0f.3a.41 DPPD opt 66.0f.3a.40 DPPS | |||||
| * | [INTERP] Cosmetic change to 0F 1C..1E opcodes | ptitSeb | 2025-04-24 | 1 | -3/+3 | |
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| * | [INTERP] Added nan handling on AVX.F3.0F 59 opcode | ptitSeb | 2025-04-24 | 1 | -0/+2 | |
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| * | [ARM64_DYNAREC] Simplified code for MOVS[H/L]DUP opcodes | ptitSeb | 2025-04-24 | 2 | -19/+3 | |
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| * | [INTERP] Fixed another opcode name comment | ptitSeb | 2025-04-24 | 1 | -1/+1 | |
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| * | [LA64_DYNAREC] Add POPCNT/TZCNT/LZCNT ops. (#2566) | phorcys | 2025-04-24 | 5 | -8/+170 | |
| | | | | | | 66.f3.0f.b8/bc/bd POPCNT/TZCNT/LZCNT 16bits ops f3.0f.bd LZCNT fix f3.0f.bc TZCNT (GETED/RESTORE_EFLAGS x1 conflict) | |||||
| * | [ARM64_DYNAREC] Small iùprovments to some (V)MOVQ opcodes | ptitSeb | 2025-04-24 | 4 | -11/+12 | |
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| * | [INTERP] Fixed a comment | ptitSeb | 2025-04-24 | 1 | -1/+1 | |
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| * | [ARM64_DYNAREC] Small change and optims to various (V)MOVNT* opcodes | ptitSeb | 2025-04-24 | 4 | -33/+24 | |
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| * | [INTERP] Small change to various (V)MOVNT* opcodes, forbidding reg -> reg form | ptitSeb | 2025-04-24 | 6 | -56/+74 | |
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| * | [DYNAREC] Added ranged Dynablock dump (#2570) | Yang Liu | 2025-04-24 | 23 | -114/+116 | |
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| * | [ARM64_DYNAREC] Minor optim to MOVNTDQA (#2568) | Yang Liu | 2025-04-24 | 1 | -3/+10 | |
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| * | Added some missing newlines (#2567) | Yang Liu | 2025-04-24 | 1 | -2/+2 | |
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| * | [ARM64_DYNAREC] Small fixes and improvments to (V)MOVMSKP[S/D] opcodes | ptitSeb | 2025-04-23 | 4 | -15/+12 | |
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| * | [ARM64_DYNAREC] Few fixes and small cosmetic changes to some partial (V)MOV ↵ | ptitSeb | 2025-04-23 | 8 | -58/+36 | |
| | | | | | opcodes | |||||
| * | [INTERP] Fex fixes and small cosmetic changes to some partial (V)MOV opcodes | ptitSeb | 2025-04-23 | 5 | -47/+80 | |
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| * | [ARM64_DYNAREC] Made REP MOVSB optimisation flagless | ptitSeb | 2025-04-23 | 1 | -4/+4 | |
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| * | [ARM64_DYNAREC] Optimized REP STOSB | ptitSeb | 2025-04-23 | 2 | -2/+36 | |
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| * | [PERFMAP] Added x86 address of code when function name cannot be found, ↵ | ptitSeb | 2025-04-23 | 1 | -1/+4 | |
| | | | | | instead of ??? | |||||
| * | [ARM64_DYNAREC] Various improvment to various SSE/AVX 128bits/256bits mov ↵ | ptitSeb | 2025-04-23 | 8 | -89/+144 | |
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| * | [INTERP] RaZ upper 128bits on vmov* Ex, Gx if Ex is a registry (unused?) | ptitSeb | 2025-04-23 | 2 | -0/+6 | |
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| * | [RBTREE] Fixed an edge case (#2562) | rajdakin | 2025-04-22 | 1 | -1/+3 | |
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| * | [DYNAREC] Added a x87pc test and some cosmetic changes too (#2561) | Yang Liu | 2025-04-22 | 16 | -158/+83 | |
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| * | [LA64_DYNAREC] Add SSSE3's mmx ops. (#2559) | phorcys | 2025-04-22 | 1 | -0/+162 | |
| | | | | | | | | | | | | | | | | | | 0f.38.00 PSHUFB 01 PHADDW 02 PHADDD 03 PHADDSW 04 PMADDUBSW 05 PHSUBW 06 PHSUBD 07 PHSUBSW 08 PSIGNB 09 PSIGNW 0a PSIGND 0b PMULHRSW 1c PABSB 1d PABSW 1e PABSD | |||||
| * | [ARM64_DYNAREC] Improved (V)[MIN/MAX][S/P][S/D] opcodes | ptitSeb | 2025-04-22 | 4 | -34/+10 | |
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| * | [INTERP] Improved (V)[MIN/MAX][S/P][S/D] opcodes | ptitSeb | 2025-04-22 | 8 | -34/+25 | |
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| * | [RBTREE] Cache boundary nodes and remove `add_range()` (#2557) | Chi-Kuan Chiu | 2025-04-22 | 1 | -31/+54 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Cache leftmost and rightmost node Add two fields to `rbtree`: `lefter` and `righter`, to cache the leftmost and rightmost nodes respectively. This eliminates the need for O(log N) traversals in `rb_get_lefter()` and `rb_get_righter()`. Motivated by the Linux kernel's use of cached pointers for `rb_first()` and `rb_last()`, this change improves efficiency of boundary queries by replacing repeated tree walks with direct pointer dereference. Experiment: running `chess.exe` with Box64 + Wine (#2511) - ~3,500 insertions into the tree - 607 lightweight cache updates (single assignment) - 397 full tree traversals avoided This results in reduced runtime overhead for boundary checks, with memory cost (+2 pointer per tree). Expected benefits increase in larger or more dynamic workloads. Ref: https://docs.kernel.org/core-api/rbtree.html * Remove redundant add_range() wrapper The function `add_range()` was only called when `tree->root == NULL`. In such cases, the while-loop inside `add_range()` never runs, resulting in a call to `add_range_next_to()` with `prev == NULL`. Replaced it with direct calls to `add_range_next_to(tree, NULL, ...)`. | |||||
| * | [RV64_DYNAREC] Better handling of x87double=2 (#2560) | Yang Liu | 2025-04-22 | 10 | -1/+47 | |
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| * | [ARM64_DYNAREC] Small improvements to (V)MASKMOVDQU opcode | ptitSeb | 2025-04-21 | 2 | -6/+4 | |
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| * | [ARM64_DYNAREC] Better handling of x87double=2 | ptitSeb | 2025-04-21 | 10 | -0/+53 | |
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| * | [ARM64_DYNAREC] Fixed potential issue with (V)LDDQU opcode | ptitSeb | 2025-04-21 | 2 | -3/+3 | |
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| * | [DYNAREC] More handling of low precision x87 flag change (#2556) | Yang Liu | 2025-04-21 | 4 | -2/+8 | |
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| * | [INTERP] More fixes to INSERTQ/EXTRQ opcodes | ptitSeb | 2025-04-21 | 2 | -13/+17 | |
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| * | [RV64_DYNAREC][TRACE][COSIM] Improve x87 fiability in dynarec trace and ↵ | Yang Liu | 2025-04-21 | 1 | -1/+1 | |
| | | | | | cosim scenario (#2555) | |||||
| * | [ARM64_DYNAREC] Add/Improved (V)H[ADD/SUB]P[S/D] opcodes | ptitSeb | 2025-04-21 | 6 | -23/+53 | |
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| * | [ENV][COSIM] Enable x87double only if it's off (#2554) | Yang Liu | 2025-04-21 | 1 | -1/+2 | |
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| * | [ARM64_DYNAREC] Small change to 66 0F 3A 17 opcode | ptitSeb | 2025-04-21 | 1 | -2/+2 | |
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| * | [INTERP] Fixed EXTRQ opcode | ptitSeb | 2025-04-21 | 1 | -3/+3 | |
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| * | [ARM64_DYNAREC] Minor cosmetic changes | ptitSeb | 2025-04-21 | 2 | -2/+2 | |
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| * | [INTERP] Better NAN handling for (V)DIV[P/S][S/D] opcodes | ptitSeb | 2025-04-21 | 3 | -0/+5 | |
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| * | [INTERP] VDPPD has no 256bits version | ptitSeb | 2025-04-21 | 1 | -12/+2 | |
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| * | [RV64_DYNAREC] Added X87DOUBLE=2 support (#2553) | Yang Liu | 2025-04-21 | 22 | -24/+88 | |
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| * | [ARM64_DYNAREC] Another potential fix for X87DOUBLE=2 | ptitSeb | 2025-04-21 | 1 | -1/+1 | |
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| * | [ARM64_DYNAREC] Fixed some potential issues with BOX64_DYNAREC_DOUBLE=2 | ptitSeb | 2025-04-21 | 3 | -4/+1 | |
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| * | [TRACE] Fixed an issue with a trace on dynablock exiting execution | ptitSeb | 2025-04-21 | 1 | -1/+1 | |
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| * | [TRACE] Better trace, using maplile name if available, and better write on a ↵ | ptitSeb | 2025-04-20 | 2 | -2/+5 | |
| | | | | | dynablock memory log | |||||