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path: root/target/arm/cpu64.c (follow)
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* target/arm: Default to 1GHz cntfrq for 'max' and new CPUsPeter Maydell2024-04-301-0/+2
* gdbstub: Infer number of core registers from XMLAkihiko Odaki2024-02-281-1/+0
* target/arm: Advertise Cortex-A53 erratum #843419 fix via REVIDRArd Biesheuvel2024-02-271-1/+1
* target/arm/kvm: Have kvm_arm_sve_get_vls take a ARMCPU argumentPhilippe Mathieu-Daudé2023-12-191-1/+1
* target/arm: Move feature test functions to their own headerPeter Maydell2023-10-271-0/+1
* hw/core/cpu: Return static value with gdb_arch_name()Akihiko Odaki2023-10-111-2/+2
* target/arm: Remove size and alignment for cpu subclassesRichard Henderson2023-10-031-4/+0
* target/arm: Implement FEAT_PACQARMA3Richard Henderson2023-09-081-3/+21
* target/arm: Don't change pauth features when changing algorithmRichard Henderson2023-09-081-25/+45
* arm: spelling fixesMichael Tokarev2023-07-251-1/+1
* target/arm: Avoid over-length shift in arm_cpu_sve_finalize() error casePeter Maydell2023-07-061-2/+2
* target/arm: Move 64-bit TCG CPUs into tcg/Fabiano Rosas2023-05-021-684/+3
* target/arm: Do not expose all -cpu max features to qtestsFabiano Rosas2023-05-021-3/+9
* target/arm: Extract TCG -cpu max code into a functionFabiano Rosas2023-05-021-14/+18
* target/arm: Remove dead code from cpu_max_set_sve_max_vqFabiano Rosas2023-05-021-6/+0
* target/arm: Move cortex sysregs into a separate fileFabiano Rosas2023-05-021-0/+1
* target/arm: Implement FEAT_PAN3Peter Maydell2023-04-201-1/+1
* target/arm: Add Neoverse-N1 registersChen Baozi2023-03-211-0/+69
* target/arm: Enable FEAT_FGT on '-cpu max'Peter Maydell2023-02-031-0/+1
* target/arm: cleanup cpu includesClaudio Fontana2023-01-051-6/+0
* target/arm: Report FEAT_EVT for TCG '-cpu max'Peter Maydell2022-12-151-0/+1
* target/arm: Add Cortex-A55 CPUTimofey Kutergin2022-12-151-0/+69
* target/arm: Implement FEAT_HAFDBS, dirty bit portionRichard Henderson2022-10-271-1/+1
* target/arm: Implement FEAT_HAFDBS, access flag portionRichard Henderson2022-10-271-0/+1
* target/arm: Implement FEAT_E0PDPeter Maydell2022-10-271-0/+1
* target/arm: Rearrange cpu64.c so all the CPU initfns are togetherPeter Maydell2022-09-291-356/+356
* target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max'Peter Maydell2022-09-141-1/+1
* target/arm: Advertise FEAT_ETS for '-cpu max'Peter Maydell2022-09-141-0/+1
* target/arm: Add cortex-a35Hao Wu2022-09-141-0/+80
* target/arm: Enable SME for -cpu maxRichard Henderson2022-07-111-0/+11
* target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2Peter Maydell2022-07-071-0/+6
* target/arm: Add cpu properties for SMERichard Henderson2022-06-271-4/+110
* target/arm: Unexport aarch64_add_*_propertiesRichard Henderson2022-06-271-2/+2
* target/arm: Generalize cpu_arm_{get, set}_default_vec_lenRichard Henderson2022-06-271-13/+14
* target/arm: Generalize cpu_arm_{get,set}_vqRichard Henderson2022-06-271-14/+15
* target/arm: Create ARMVQMapRichard Henderson2022-06-271-11/+11
* target/arm: Move error for sve%d property to arm_cpu_sve_finalizeRichard Henderson2022-06-271-8/+7
* target/arm: Use uint32_t instead of bitmap for sve vq'sRichard Henderson2022-06-081-61/+56
* target/arm: Implement FEAT_DoubleFaultPeter Maydell2022-06-081-2/+2
* target/arm: Declare support for FEAT_RASv1p1Peter Maydell2022-06-081-0/+1
* target/arm: Enable FEAT_HCX for -cpu maxRichard Henderson2022-05-191-0/+1
* target/arm: Make number of counters in PMCR follow the CPUPeter Maydell2022-05-191-0/+11
* hw/intc/arm_gicv3: Use correct number of priority bits for the CPUPeter Maydell2022-05-191-0/+6
* target/arm: Implement FEAT_IDSTPeter Maydell2022-05-191-0/+1
* target/arm: Enable FEAT_S2FWB for -cpu maxPeter Maydell2022-05-191-0/+11
* target/arm: Define neoverse-n1Richard Henderson2022-05-091-0/+66
* target/arm: Define cortex-a76Richard Henderson2022-05-091-0/+66
* target/arm: Enable FEAT_DGH for -cpu maxRichard Henderson2022-05-091-0/+1
* target/arm: Enable FEAT_CSV3 for -cpu maxRichard Henderson2022-05-091-0/+1
* target/arm: Enable FEAT_CSV2_2 for -cpu maxRichard Henderson2022-05-091-1/+2